ZnO Thin Film Transistor: Effect of Traps and Grain Boundaries
DOI:
https://doi.org/10.11113/elektrika.v17n1.9Keywords:
TCAD simulation, thin film transistor, ZnO, Grain boundary, defectsAbstract
Recently ZnO has drawn a lot of attention in semiconductor industry due to its interesting features. High exciton binding energy, high resistivity against radiation, high breakdown voltage, low temperature deposition are some of the interesting features of this material. Zinc oxide TFT device gains an increasing interest for its potential in sensing applications due to its biocompability, chemical stability and simple fabrication process with various methods and high surface-to-volume ratio. However, ZnO TFT devices from previous work exhibited poor ION and field effect mobility. This work investigates the cause of its poor performance by focusing only two factors: traps and defects in the channel and grain boundary. The work was performed in Silvaco TCAD 2D simulator. It was found that a single grain boundary in the channel causes a reduction of the ION by 95%. The effect in the ION is less severe when traps and defects were introduced in the ZnO channel. The results can assist in optimizing the TFT device performance for sensing applications.References
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